1. Field of the Invention
This invention relates to an apparatus and method for chemical/mechanical planarization (CMP) of a semiconductor wafer. More specifically, the invention is directed to an apparatus and method which increases the polish removal rate and the uniformity of the planarization process.
2. Description of Related Art
In the fabrication of semiconductor components, metal conductor lines are used to interconnect the many components in device circuits. As wiring densities in semiconductor circuit chips increase, multiple wiring levels are required to achieve interconnection of the devices, and planarization of the interlevel dielectric becomes a critical step in the fabrication process. The technology requires that the device interconnection lines be formed over a substrate containing device circuitry. These interconnection lines are typically metal or a conductor and serve to electrically interconnect the discrete circuit devices. These metal connecting lines are further insulated from the next interconnection level by thin layers of insulating material formed by, for example, chemical vapor deposition (CVD) of oxide. In order to interconnect metal lines of different wiring levels, holes are formed in the insulating layers to provide electrical access therebetween. In such wiring processes, it is desirable that the insulating layers have a smooth topography and that the thickness of the polished insulating layer be uniform across the semiconductor substrate.
Recently chemical/mechanical polishing (CMP) has been developed for providing smooth insulator topographies. Briefly, the process involves holding and rotating a thin, flat wafer of the semiconductor material against a wetted polishing surface under controlled chemical, pressure, and temperature conditions. FIG. 1 shows a conventional CMP apparatus, 10, having a rotatable polishing platen, 11, and a polishing pad, 12, mounted to the polishing platen, 11; a rotatable wafer carrier, 13, adapted so that a force indicated by arrow, 14, is exerted on semiconductor wafer, 15; a chemical slurry supply system comprising a temperature controlled reservoir, 16, and conduit, 17, which dispenses the slurry onto the polishing pad, 12. A chemical slurry containing a polishing agent, such as alumina or silica, is used as the abrasive material. Additionally, the chemical slurry contains selected chemicals which etch various surfaces of the wafer during processing. The combination of mechanical and chemical removal of material during polishing results in superior planarization of the polished surface. In this process it is important to remove a sufficient amount of material to provide a smooth surface, without removing an excessive amount of underlying materials. Thus, it is important that the polish removal rate across the wafer be uniform; i.e. the polish removal rate near the edge of the wafer is the same as the polish removal rate near the center of the wafer.
Parameters which affect:the polish removal rate are downward pressure on the wafer, rotational speeds of the polishing platen and wafer carrier, slurry particle density and size, slurry composition and temperature, and polishing pad composition. Adjustment of these parameters permits control of the polishing and planarization processes; however, the problem of non-uniform polish removal rate continues to plague conventional CMP processes because, in general, removal rates tend to be higher at the wafer edge than at the wafer center because wafer rotation causes the wafer edge region to move at a higher linear speed than the wafer central region.
Improvements in CMP processes to control uniformity have been invented, as shown in the following patents. U.S. Pat. No. 5,234,867 entitled "Method For Planarizing Semiconductor Wafers With A Non-Circular Polishing Pad" granted Aug. 10, 1993 to Laurence D. Schultz et al describes a polishing method whereby the uniformity of removal rate across a substrate is improved by controlling the time duration in which the polishing pad is in contact with the outer regions of the substrate. U.S. Pat. No. 5,240,552 entitled "Chemical Mechanical Planarization (CMP) Of A Semiconductor Wafer Using Acoustical Waves For In-situ End Point Detection" granted Aug. 31, 1993 to Chris C. Yu et al directs acoustical waves at the wafer during CMP and through analysis of the reflected waveform controls the planarization process to improve the uniformity of the process.
The present invention is directed to a novel method and apparatus for controlling the polish removal rate and uniformity of polish removal rate across a semiconductor wafer during chemical/mechanical planarization (CMP).